DRS Technologies Inc. Senior Analog IC Design Engineer in Dallas, Texas

LEONARDO DRS

LEONARDO DRS is a leading supplier of integrated products, services and support to military forces, intelligence agencies and prime contractors worldwide. Focused on defense technology, we develop, manufacture and support a broad range of systems for mission critical and military sustainment requirements, as well as homeland security.

Headquartered in Washington, DC, the Company is a wholly owned subsidiary of Leonardo, which employs more than 70,000 people worldwide. We offer a competitive compensation package and a business culture that rewards performance. For additional information on DRS, please visit our website at www.leonardodrs.com.

Company Overview

LEONARDO DRS Electro Optical Infrared Systems (EOIS) has locations in Dallas, TX, Melbourne, FL, and Cypress, CA. We develop, manufacture, and support infrared and electro-optical solutions for soldiers, ground vehicles and airborne platforms. We offer an exciting and challenging work environment, a competitive salary and benefits package, and a business culture that rewards performance.

Employing the world’s brightest. Supporting the world’s bravest.

Location

Dallas, TX

Position Summary

The individual will be a senior member of the Readout Integrated Circuit (ROIC) development team of DRS’ Electro Optics and Imaging Systems (EOIS) division. In this role, the senior analog design engineer will work closely with other team members to develop analog integrated circuits (IC) for ROIC and Focal Plane Arrays (FPA). The key responsibilities are the following: Involved in specifications of analog portions of the ROIC. Behavioral modeling and transistor-level feasibility studies for various blocks in the ROIC and FPA. Design and document towards formal design reviews. Drive mask design to implement layout view of designs. Block-level and top-level simulations to verify functionality and performance goals. Define bench-level test plans. Perform circuit characterization and validation in a lab environment. Drive review of yield/lab test results to fix bugs. Provide full support throughout the product life cycle.

Basic Qualifications and Required Skills

  • Education: BSEE minimum / MSEE preferred

  • Experience: 8+ years in CMOS mixed-signal and analog IC design experience and design integration

  • Ability to problem solve at the transistor and system levels

  • Experienced with Virtuoso and Calibre

  • Excellent written and oral communication skills

  • Demonstrated ability to execute large group and customer presentations

  • Working experience in using spectrum analyzers, oscilloscopes, signal generators, and other lab equipment, to validate analog designs

  • Experience working with production test engineers to firm up design for test and test plan details

Desired Skills

  • Proven experience completing mixed-signal and analog designs, including building blocks such as band-gaps, bias circuits, op-amps, PLLs, regulators, etc.

  • Good knowledge of ADC and DAC architectures

  • Experience executing functional verification and mixed-mode simulation

  • Have knowledge of C/MATLAB/VerilogA modeling of design blocks

  • Familiar with digital IC design using Verilog

  • Ability to analyze data in Mathcad, MATLAB, or similar tools

  • Ability to solve complex design problems

  • Ability to meet aggressive timelines

  • Ability to multi-task in an evolving project environment

  • Knowledge of infrared detector products, including ROIC and FPA technologies, preferred but not required

Duties and Responsibilities

  • Specification of block-level and top-level mixed-signal and analog designs

  • Behavioral modeling of mixed-signal and analog blocks

  • Transistor-level analog circuit design

  • Circuit-level and mixed-mode simulation and verification

  • Oversee layout design

  • Document and drive formal reviews

  • Define bench validation plans

  • Perform circuit characterization and validation in a lab environment

  • Other duties as assigned

Physical Conditions

  • Ability to lift up to 20 lbs. up to 25% of the time

Working Conditions

  • Travel up to 10%

Only candidates that meet the qualifications as outlined above will be contacted for further information.

Applicants selected for this position will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Only US citizens are eligible for a Security Clearance.

LEONARDO DRS is an equal opportunity/affirmative action employer. We consider applicants without regard to race, color, religion, creed, gender, national origin, age, disability, genetic information, marital or veteran status, or any other category protected by federal, state or local law. #EOIS